Electronic Design

Testbench Automation Tool Provides Tight Links To Verilog Simulation

Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, and a unified graphical environment for waveform analysis are all promised by version 5.0 of the VERA ...
EDN

Revised BestBench tool supports Verilog, VHDL

SAN MATEO, Calif. — Testbench tool provider Diagonal Systems AG (Zurich, Switzerland) has introduced BestBench 4.0, a new version of its HDL design and analysis tool that now includes support for ...
Electronic Design

Development Environment Supports Mixed C++ And HDL Test Benches

TestBencher Pro v8.0 adds support for mixed C++ and hardware description language (HDL) test benches using the open standard TestBuilder library. This library offers useful verification capabilities, ...